Technical Field
The present invention relates to an embedded component substrate and a semiconductor module.
Background Art
In past years, most semiconductor devices were packaged by mounting a bare chip on a lead frame and sealing the bare chip together with an island within the package. Packaging types such as SIP, DIP, and QFP were the norm, and many of these are still in common use even today because the leads protruding from the sealing resin reduce the effects of the difference in coefficient of thermal expansion between the motherboard and the chip itself.
However, miniaturization has proceeded at a rapid pace. Applications in mobile devices such as smartphones and tablet computers, for example, require small, thin packages with sophisticated functionality, and the semiconductor packaging technologies employed in such applications are constantly evolving. For example, packaging types such as BGA (a surface-mount technology in which a printed circuit board interposer is used to reduce mounting area) and MCP and POP (which facilitate miniaturization through use of 3D mounting techniques) are now widely used. These are all surface-mount technologies in which solder balls are used to replace the conventional protruding leads, thereby making it possible to achieve miniaturization and reduce mounting area. In the latter packaging types (MCP and POP), packages or chips are actually stacked on top of one another in order to achieve further reductions in mounting area.
Meanwhile, stemming from the ever-present demand for miniaturization, development of interposers and motherboards on which to mount such semiconductor packages has also proceeded actively, and thin substrates are now being developed as well. Modern smartphones, for example, utilize printed circuit boards with a 10-12 layer wiring layer and a thickness of approximately 400 μm.
Previously, electronic components and semiconductor packages were typically mounted on the surfaces of such multilayer printed circuit boards. Due to the increasingly demanding requirements from product manufacturers, however, in recent years there has been increased development of semiconductor modules in which embedded component substrates (printed circuit boards inside which components are embedded) are used as mounting substrates.
In this technology, a cavity is formed in the mounting substrate, and semiconductor devices and passive components are embedded within that cavity, thereby making it possible to achieve further reductions in the thickness of the semiconductor module itself.
FIG. 6 illustrates an example of this type of semiconductor module.
In this example, three layers of conductive patterns F1 to F3 are formed on the front surface of a core layer 11 made from a resin or metal with insulating layers interposed therebetween, and three other layers of conductive patterns B1 to B3 are formed on the rear surface of a core layer 11 with insulating layers interposed therebetween, thereby forming a six-layer substrate. A cavity 12 is formed in this mounting substrate 14, and a bare chip 13 is mounted within the cavity 12. Here, the bare chip 13 is an image sensor, and therefore the cavity 12 is not sealed with an insulating resin.
Moreover, here a “conductive pattern” refers to circuit wiring that includes pad electrodes and/or wiring or the like made from a conductive material.
As illustrated in FIG. 6, the electrodes of the bare chip 13 are connected to the pad electrodes F3 of the mounting substrate 14 via fine metal wires 15. However, due to the mechanical operation of the wire bonder, the fine metal wires 15 protrude out by a height d. As a result, when mounting a component 16 (an electronic component such as a semiconductor package, a case that holds a lens, or the like) on top of the mounting substrate 14, this height d will have a significant effect on the thickness of the overall semiconductor module 10.